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typical operating circuit adm211 sd gnd 10 25 rs-232 inputs** *internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input t1 in rs-232 outputs ttl/cmos inputs* t1 out t2 i n t4 i n t2 out t4 out 7 6 3 2 t2 t1 +5v to +10v voltage doubler +10v to ?0v voltage inverter 17 0.1 m f 16v 13 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 16v 11 0.1 m f 14 12 0.1 m f 16v 16 15 t3 in t3 out 20 1 t3 21 28 t4 ttl/cmos outputs r3 in r4 in r3 out r4 out r4 r3 24 en 27 23 22 26 r1 in r2 in r1 out r2 out r2 r1 9 4 5 8 r5 in r5 out r5 18 19 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a 0.1 m f, +5 v powered cmos rs-232 drivers/receivers adm205Cadm211/adm213 features 0.1 m f to 10 m f capacitors 120 kb/s data rate 2 receivers active in shutdown (adm213) on-board dc-dc converters 6 9 v output swing with +5 v supply low power (15 mw) low power shutdown 5 m w 6 30 v receiver input levels latch-up free plug-in upgrade for max205-211/213 applications computers peripherals modems printers instruments ? analog devices, inc., 1994 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 general description the adm2xx family of line drivers/receivers is intended for all eia-232-e and v.28 communications interfaces, especially in applications where 12 v is not available. the adm205, adm206, adm211 and adm213 feature a low power shut- down mode which reduces power dissipation to less than 5 m w making them ideally suited for battery powered equipment. the adm205 does not require any external components and is par- ticularly useful in applications where printed circuit board space is critical. the adm213 has an active-low shutdown and an active-high receiver enable control. two receivers of the adm213 remain active during shutdown. this feature is useful for ring indicator monitoring. all members of the adm2xx family, except the adm209, in- clude two internal charge pump voltage converters which allow operation from a single +5 v supply. these converters convert the +5 v input power to the 10 v required for rs-232 output levels. the adm209 is designed to operate from +5 v and +12 v supplies. an internal +12 v to C12 v charge pump volt- age converter generates the C12 v supply. table i. selection table no. of no. of low power ttl no. of receivers part power rs-232 rs-232 external shutdown three-state active in number supply voltage drivers receivers capacitors (sd) en shutdown adm205 +5 v 5 5 none yes yes 0 adm206 +5 v 4 3 4 yes yes 0 adm207 +5 v 5 3 4 no no 0 adm208 +5 v 4 4 4 no no 0 adm209 +5 v & +9 v to +13.2 v 3 5 2 no yes 0 adm211 +5 v 4 5 4 yes yes 0 adm213 +5 v 4 5 4 yes ( sd ) yes (en) 2
adm205Cadm211/adm213Cspecifications parameter min typ max units test conditions/comments output voltage swing 5 9 volts all transmitter outputs loaded with 3 k w to ground v cc power supply current 3 7 ma no load, adm206, adm211, adm213 5 9 ma no load, adm205, adm207, adm208 0.4 1 ma no load, adm209 v+ power supply current 3.5 5 ma no load, v+ = 12 v adm209 only shutdown supply current 1 5 m a input logic threshold low, v inl 0.8 v t in , en , sd, en, sd input logic threshold high, v inh 2.0 v t in , en , sd, en, sd logic pull-up current 10 25 m at in = 0 v rs-232 input voltage range C30 +30 v rs-232 input threshold low 0.8 1.2 v rs-232 input threshold high 1.7 2.4 v rs-232 input hysteresis 0.2 0.5 1.0 v rs-232 input resistance 357k w ttl/cmos output voltage low, v ol 0.4 v i out = 1.6 ma ttl/cmos output voltage high, v oh 3.5 v i out = C1.0 ma ttl/cmos output leakage current 0.05 5 m a en = v cc , en = 0 v, 0 v r out v cc output enable time (t en ) 115 ns adm205, adm206, adm209, adm211 (figure 25. c l = 150 pf) output disable time (t dis ) 165 ns adm205, adm206, adm209, adm211 (figure 25. r l = 1 k w ) propagation delay 0.5 5 m s rs-232 to ttl instantaneous slew rate l 25 30 v/ m sc l = 10 pf, r l = 3-7 k w , t a = +25 c transition region slew rate 3 6 v/ m sr l = 3 k w , c l = 2500 pf measured from +3 v to C3 v or C3 v to +3 v output resistance 300 w v cc = v+ = vC = 0 v, v out = 2 v rs-232 output short circuit current 12 60 ma note 1 sample tested to ensure compliance. specifications subject to change without notice. (v cc = +5 v 6 10% (206, 207, 208, 2o9, 211, 213); v cc = +5 v 6 5% (adm205); v+ = +9 v to +13.2 v (adm209); c1Cc4 = 0.1 m f ceramic. all specifications t min to t max unless otherwise noted.) rev. 0 C2C absolute maximum ratings* (t a = +25 c unless otherwise noted) v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +6 v v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (v cc C 0.3 v) to +14 v vC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 v to C14 v input voltages t in . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 v output voltages t out . . . . . . . . . . . . . . . . . . . (v+, + 0.3 v) to (vC, C0.3 v) r out . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to (v cc + 0.3 v) short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous power dissipation n-24 dip (derate 13.5 mw/ c above +70 c) . . . 1000 mw n-24a dip (derate 13.5 mw/ c above +70 c) . . 500 mw r-24 soic (derate 12 mw/ c above +70 c) . . . . . 850 mw r-28 soic (derate 12.5 mw/ c above +70 c) . . 900 mw rs-28 ssop (derate 10 mw/ c above +70 c) . . . . 900 mw q-24 cerdip (derate 12.5 mw/ c above +70 c) . 1000 mw d-24 ceramic (derate 20 mw/ c above +70 c) . . 1000 mw thermal impedance, q ja n-24 dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 c/w n-24a dip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 c/w r-24 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 c/w r-28 soic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 c/w rs-28 ssop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-14 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 c/w q-16 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-20 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 c/w q-24 cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 c/w d-24 ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 c/w operating temperature range industrial (a version) . . . . . . . . . . . . . . . . . -40 c to +85 c storage temperature range . . . . . . . . . . . . . C65 c to +150 c lead temperature, soldering . . . . . . . . . . . . . . . . . . . +300 c vapour phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215 c infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220 c esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2000 v *this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specifica- tion is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
adm205Cadm211/adm213 rev. 0 C3C ordering guide temperature package temperature package temperature package model range option* model range option* model range option* adm205 adm206 adm207 adm205an C40 c to +85 c n-24a adm206an C40 c to +85 c n-24 adm207an C40 c to +85 c n-24 adm206ar C40 c to +85 c r-24 adm207ar C40 c to +85 c r-24 adm206ars C40 c to +85 c rs-24 adm207ars C40 c to +85 c rs-24 adm208 adm209 adm211 adm208an C40 c to +85 c n-24 adm209an C40 c to +85 c n-24 adm211ar C40 c to +85 c r-28 adm208ar C40 c to +85 c r-24 adm209ar C40 c to +85 c r-24 adm211ars C40 c to +85 c rs-28 adm208ars C40 c to +85 c rs-24 adm209ars C40 c to +85 c rs-24 adm213 adm213ar C40 c to +85 c r-28 adm213ars C40 c to +85 c rs-28 *n = plastic dip; r = small outline ic (soic); rs = small shrink outline package (ssop). 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm205 t1 in t2 in t3 in t4 in t5 in t1 out t2 out t3 out t4 out t5 out v cc gnd sd en r3 in r4 in r5 in r1 in r2 in r2 out r1 out r3 out r4 out r5 out figure 1. adm205 dip pin configuration adm205 0.1 m f t1 in sd rs-232 outputs ttl/cmos inputs * t1 out gnd 11 t2 in t3 in t4 in t5 in t2 out t3 out t4 out t5 out t3 22 16 7 8 15 21 19 4 2 3 1 t4 t2 t1 t5 rs-232 inputs ** ttl/cmos outputs r1 out r1 in r2 in r3 in r4 in r5 in r2 out r3 out r4 out r5 out r1 r5 r4 r3 r2 20 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 13 5 24 10 18 14 17 6 9 23 12 +5v input v cc figure 2. adm205 typical operating circuit
adm205Cadm211/adm213 rev. 0 C4C 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm206 t1 in t2 in t1 out t2 out t3 out v cc gnd sd en r3 in r1 in r2 in r2 out r1 out r3 out t3 in t4 in t4 out v+ v c1+ c1 c2+ c2 figure 3. adm206 dip/soic/ssop pin configuration ttl/cmos inputs * ttl/cmos outputs t1 in adm206 sd rs-232 outputs t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 6 7 18 21 3 1 2 24 t4 t2 t1 rs-232 inputs ** r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 20 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 16 4 23 17 22 5 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 11 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 6.3v 0.1 m f 16v 0.1 m f 16v 9 0.1 m f figure 4. adm206 typical operating circuit 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 619 top view (not to scale) adm207 t1 in t2 in t1 out t2 out t3 out v cc gnd r3 in r1 in r2 in r2 out r1 out r3 out t3 in t4 in t4 out v+ v c1+ c1 c2+ c2 t5 in t5 out figure 5. adm207 dip/soic/ssop pin configuration t1 in adm207 rs-232 outputs ttl/cmos inputs * t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 6 7 18 3 1 2 24 t4 t2 t1 rs-232 inputs ** ttl/cmos outputs r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input 16 4 23 17 22 5 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 0.1 m f 16v 11 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 6.3v 0.1 m f 16v t5 in t5 out 21 20 t5 9 0.1 m f figure 6. adm207 typical operating circuit
adm205Cadm211/adm213 rev. 0 C5C 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 619 top view (not to scale) adm209 r4 in r5 in r1 in r4 out r1 out v cc gnd t3 in t2 in r2 out r5 out r3 out r3 in t1 out t1 in v+ nc c+ c t3 out r2 in t2 out v en nc = no connect figure 9. adm209 dip/soic/ssop pin configuration t1 in adm209 nc rs-232 outputs ttl/cmos inputs * t1 out gnd 3 t2 in t3 in t2 out t3 out t3 23 24 16 15 20 13 19 t2 t1 rs-232 inputs ** ttl/cmos outputs r3 in r4 in r5 in r3 out r4 out r5 out r5 r4 r3 14 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en 9 18 12 10 11 17 +12v to ?2v voltage inverter 7 6 8 0.1 m f 16v 5 +5v input v cc v+ v c1+ c1 0.1 m f 16v 4 +9v to +13.2v input r1 in r2 in r1 out r2 out r2 r1 2 21 22 1 0.1 m f figure 10. adm209 typical operating circuit 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 top view (not to scale) adm208 t1 in r1 in t1 out r2 out t2 out v cc gnd r4 in r2 in r3 in r3 out r1 out r4 out t2 in t3 in t3 out v+ v c1+ c1 c2+ c2 t4 in t4 out figure 7. adm208 dip/soic/ssop pin configuration t1 in adm208 rs-232 outputs ttl/cmos inputs * t1 out gnd 8 t2 in t3 in t4 in t2 out t3 out t4 out t3 19 5 18 1 2 24 t4 t2 t1 rs-232 inputs ** ttl/cmos outputs r1 in r2 in r3 in r1 out r2 out r3 out r3 r2 r1 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input 3 7 23 4 22 6 +5v to +10v voltage doubler +10v to ?0v voltage inverter 14 13 12 10 15 0.1 m f 16v 11 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 6.3v 0.1 m f 16v 21 20 9 r4 in r4 out r3 16 17 0.1 m f figure 8. adm208 typical operating circuit
adm205Cadm211/adm213 rev. 0 C6C 1 2 3 7 28 27 26 22 8 9 10 21 20 19 11 12 18 17 4 5 25 24 623 top view (not to scale) 13 14 16 15 adm211 r2 out r2 in r5 in t4 in r3 in t1 out t2 out t3 out t4 out r5 out v+ v v cc c1+ c1 c2+ c2 gnd sd r3 out en t3 in r4 in r4 out r1 in r1 out t1 in t2 in figure 11. adm211 soic/ssop pin configuration adm211 gnd 10 sd 25 rs-232 inputs ** ttl/cmos outputs 24 * internal 400k w pull-up resistor on each ttl/cmos input **internal 5k w pull-down resistor on each rs-232 input en r5 in r5 out r5 18 19 r4 in r4 out r4 23 22 r1 in r1 out r1 r3 in r3 out r3 27 26 9 r2 in r2 out r2 4 5 8 t1 in rs-232 outputs ttl/cmos inputs * t1 out t3 in t3 out t3 20 7 2 1 t1 +5v to +10v voltage doubler +10v to ?0v voltage inverter 16 15 14 12 17 0.1 m f 16v 13 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 16v 0.1 m f 16v t4 in t4 out t4 21 28 11 0.1 m f t2 in t2 out 6 3 t2 figure 12. adm211 typical operating circuit 1 2 3 7 28 27 26 22 8 9 10 21 20 19 11 12 18 17 4 5 25 24 623 top view (not to scale) 13 14 16 15 adm213 r2 out r2 in r5 in * t4 in r3 in t1 out t2 out t3 out t4 out r5 out * v+ v v cc c1+ c1 c2+ c2 gnd sd r3 out en t3 in r4 in * r4 out * r1 in r1 out t1 in t2 in * active in shutdown figure 13. adm213 soic/ssop pin configuration adm213 gnd 10 sd 25 rs-232 inputs ** ttl/cmos outputs 24 * internal 400k w pull-up resistor on each ttl/cmos input ** internal 5k w pull-down resistor on each rs-232 input *** active in shutdown en r5 in *** r5 out *** r5 18 19 r4 in *** r4 out *** r4 23 22 r1 in r1 out r1 r3 in r3 out r3 27 26 9 r2 in r2 out r2 4 5 8 t1 in rs-232 outputs ttl/cmos inputs * t1 out t3 in t3 out t3 20 7 2 1 t1 +5v to +10v voltage doubler +10v to ?0v voltage inverter 16 15 14 12 17 0.1 m f 16v 13 0.1 m f 6.3v +5v input v cc v+ v c1+ c1 c2+ c2 0.1 m f 16v 0.1 m f 16v t4 in t4 out t4 21 28 11 0.1 m f t2 in t2 out 6 3 t2 figure 14. adm213 typical operating circuit
adm205Cadm211/adm213 rev. 0 C7C pin function description mnemonic function v cc power supply input 5 v 10% (+5 v 5% adm205). v+ internally generated positive supply (+10 v nominal) on all parts except adm209. adm209 requires external 9 v to 13.2 v supply. vC internally generated negative supply (C10 v nominal). gnd ground pin. must be connected to 0 v. c+ (adm209 only) external capacitor (+ terminal) is connected to this pin. cC (adm209 only) external capacitor (C terminal) is connected to this pin. c1+ (adm206, adm207, adm208, adm211, adm213) external capacitor (+ terminal) is connected to this pin. c1C (adm206, adm207, adm208, adm211, adm213) external capacitor (C terminal) is connected to this pin. c2+ (adm206, adm207, adm208, adm211, adm213) external capacitor (+ terminal) is connected to this pin. c2C (adm206, adm207, adm208, adm211, adm213) external capacitor (C terminal) is connected to this pin. t in transmitter (driver) inputs. these inputs accept ttl/cmos levels. an internal 400 k w pull-up resistor to vcc is connected on each input. t out transmitter (driver) outputs. these are rs-232 levels (typically 10 v). r in receiver inputs. these inputs accept rs-232 signal levels. an internal 5 k w pull-down resistor to gnd is con- nected on each input. r out receiver outputs. these are ttl/cmos levels. en /en enable input. active low on adm205, adm206, adm209, adm211. active high on adm213. this input is used to enable/disable the receiver outputs. with en = low (en = high adm213), the receiver outputs are en- abled. with en =high (en = low adm213), the outputs are placed in a high impedance state. this facility is useful for connecting to microprocessor systems. sd/ sd shutdown input. active high on adm205, adm206, adm211. active low on adm213. with sd = high on the adm205, adm206, adm211, the charge pump is disabled, the receiver outputs are placed in a high impedance state and the driver outputs are turned off. with sd low on the adm213, the charge pump is disabled, the driver outputs are turned off and all receivers except r4 and r5 are placed in a high impedance state. in shutdown, the power consumption reduces to 5 m w. nc no connect. no connections are required to this pin. table ii. adm205, adm206, adm211 truth table sd en status transmitters t1Ct5 receivers r1Cr5 0 0 normal operation enabled enabled 0 1 normal operation enabled disabled 1 0 shutdown disabled disabled table iii. adm213 truth table sd en status transmitters t1-t4 receivers r1-r3 receivers r4, r5 0 0 shutdown disabled disabled disabled 0 1 shutdown disabled disabled enabled 1 0 normal operation enabled disabled disabled 1 1 normal operation enabled enabled enabled
0 40 2 0 6 4 8 10 30 20 10 | v | v out ?volts i out ?ma v+ figure 15. charge pump v+, vC vs. current 18 4 2500 10 6 8 0 16 12 14 2000 1500 1000 500 capacitive load ?pf slew rate ?v/ m s figure 16. transmitter slew rate vs. load capacitance 4 5.0 6 3.0 10 8 4.0 v cc ?v v out ?v v out (1 o/p loaded) v out (all o/ps loaded) figure 17. transmitter output voltage vs. v cc 12 0 8 2 0 6 4 8 10 6 4 2 t out ?v t out high t out low i out ?ma figure 18. transmitter output voltage vs. current 0 5 100 3 300 200 4 v cc ?v v+, v?impedance ? w v?(loaded) v?(unloaded) v+ (unloaded) v+ (loaded) figure 19. charge pump impedance vs. v cc C8C rev. 0 adm205Cadm211/adm213Ctypical performance characteristics
adm205Cadm211/adm213 rev. 0 C9C 10 90 100 0% 5v 0.8 v a3 5v 5 b l w 1ms h o figure 20. charge pump, v+, vC exiting shutdown 10 90 100 0% 5v 0.8 v a3 5 b l w 5 m s h o figure 21. transmitter output loaded slew rate 10 90 100 0% 5v 0.8 v a3 5 b l w 1 m s h o figure 22. transmitter output unloaded slew rate general information the ADM205-ADM211 and adm213 family of rs-232 driv- ers/receivers are designed to solve interface problems by meeting the eia-232-e specifications while using a single digital +5 v supply. the eia-232-e standard requires transmitters which will deliver 5 v minimum on the transmission channel and re- ceivers which can accept signal levels down to 3 v. the ADM205-ADM211 and adm213 meet these requirements by integrating step up voltage converters and level shifting trans- mitters and receivers onto the same chip. cmos technology is used to keep the power dissipation to an absolute minimum. a comprehensive range of transmitter/receiver combinations is available to cover most communications needs. the adm205C adm211 and adm213 are modifications, enhancements and improvements to the ad230Cad241 family and derivatives thereof. they are essentially plug-in compatible and do not have materially different applications. the adm205, adm206, adm211, and adm213 are particu- larly useful in battery powered systems as they feature a low power shutdown mode which reduces power dissipation to less than 5 m w. the adm205 is designed for applications where space saving is important as the charge pump capacitors are molded into the package. the adm209 includes only a negative charge pump converter and are intended for applications where a positive 12 v is available. to facilitate sharing a common line or for connection to a mi- croprocessor data bus the adm205, adm206, adm209, adm211 and adm213 feature an enable ( en ) function. when disabled, the receiver outputs are placed in a high impedance state. circuit description the internal circuitry in the ADM205-ADM211 and adm213 consists of three main sections. these are: (a) a charge pump voltage converter (b) rs-232 to ttl/cmos receivers (c) ttl/cmos to rs-232 transmitters charge pump dc-dc voltage converter the charge pump voltage converter consists of an oscillator and a switching matrix. the converter generates a 10 v supply from the input 5 v level. this is done in two stages using a switched capacitor technique as illustrated in figures 23 and 24. first, the 5 v input supply is doubled to 10 v using capacitor c1 as the charge storage element. the 10 v level is then in- verted to generate C10 v using c2 as the storage element. s1 s3 v+ = 2v cc s2 s4 internal oscillator c1 c3 v cc gnd v cc figure 23. charge-pump voltage doubler s1 s3 s2 s4 internal oscillator c2 c4 v? = ?(v+) gnd v+ gnd from voltage doubler figure 24. charge-pump voltage inverter capacitors c3 and c4 are used to reduce the output ripple. their values are not critical and can be reduced if higher levels of ripple are acceptable. the charge pump capacitors c1 and c2 may also be reduced at the expense of higher output imped- ance on the v+ and vC supplies. the v+ and vC supplies may also be used to power external cir- cuitry if the current requirements are small.
adm205Cadm211/adm213 rev. 0 C10C transmitter (driver) section the drivers convert ttl/cmos input levels into eia-232-e output levels. with v cc = +5 v and driving a typical eia-232-e load, the output voltage swing is 9 v. even under worst case conditions the drivers are guaranteed to meet the 5 v eia-232-e minimum requirement. the input threshold levels are both ttl and cmos compat- ible with the switching threshold set at v cc /4. with a nominal v cc = 5 v the switching threshold is 1.25 v typical. unused in- puts may be left unconnected, as an internal 400 k w pull-up re- sistor pulls them high forcing the outputs into a low state. as required by the eia-232-e standard, the slew rate is limited to less than 30 v/ m s without the need for an external slew limit- ing capacitor and the output impedance in the power-off state is greater than 300 w . receiver section the receivers are inverting level shifters which accept eia-232-e input levels ( 5 v to 15 v) and translate them into 5 v ttl/ cmos levels. the inputs have internal 5 k w pull-down resistors to ground and are also protected against overvoltages of up to 30 v. the guaranteed switching thresholds are 0.8 v mini- mum and 2.4 v maximum which are well within the 3 v eia-232-e requirement. the low level threshold is deliberately positive as it ensures that an unconnected input will be inter- preted as a low level. the receivers have schmitt trigger inputs with a hysteresis level of 0.5 v. this ensures error-free reception for both noisy inputs and for inputs with slow transition times. shutdown (sd) the adm205, adm206, adm211 and adm213 feature a control input which may be used to disable the part and reduce the power consumption to less than 5 m w. this is very useful in battery operated systems. during shutdown the charge pump is turned off, the transmitters are disabled and all receivers except r4 and r5 on the adm213 are put into a high-impedance dis- abled state. receivers r4 and r5 on the adm213 remain en- abled during shutdown. this feature allows monitoring external activity such as ring indicator monitoring while the device is in a low power shutdown mode. the shutdown control input is ac- tive high on all parts except the adm213 where it is active low. refer to tables ii and iii. enable input the adm205, adm209, adm211, and adm213 feature an enable input used to enable or disable the receiver outputs. the enable input is active low on the adm205, adm209, adm211 and active-high on the adm213. refer to tables ii and iii. when disabled, all receiver outputs are placed in a high imped- ance state. this function allows the outputs to be connected di- rectly to a microprocessor data bus. it can also be used to allow receivers from different devices to share a common data line. the timing diagram for the enable function is shown in figure 25. t en t dis 3v 0v r out 3.5v 0.8v v oh ?0.1v v vol + 0.1v en * * polarity of en is reversed for adm213 figure 25. enable timing application hints driving long cables in accordance with the eia-232-e standard, long cables are permissible provided that the total load capacitance does not ex- ceed 2500 pf. for longer cables which do exceed this, then it is possible to trade off baud rate vs. cable length. large load ca- pacitances cause a reduction in slew rate, and hence the maximum transmission baud rate is decreased. the adm205Cadm211 and adm213 are designed so that the slew rate reduction with in- creasing load capacitance is minimized. for the receivers, it is important that a high level of noise immu- nity be inbuilt so that slow rise and fall times do not cause mul- tiple output transitions as the signal passes slowly through the transition region. the adm205Cadm211 and adm213 have 0.5 v of hysteresis to guard against this. this ensures that, even in noisy environments, error-free reception can be achieved. high baud rate operation the adm205Cadm211 and adm213 feature high slew rates permitting data transmission at rates well in excess of the eia-232-e specification. the drivers maintain 5 v signal levels at data rates up to 120-kb/s under worst-case loading conditions.
adm205Cadm211/adm213 rev. 0 C11C outline dimensions dimensions shown in inches and (mm). 24-lead plastic dip (n-24) pin 1 0.260 0.001 (6.61 0.03) 24 1 13 12 0.32 (8.128) 0.30 (7.62) 0.011 (0.28) 0.009 (0.23) 15 0 0.02 (0.5) 0.016 (0.41) 0.130 (3.30) 0.128 (3.25) 0.07 (1.78) 0.05 (1.27) seating plane 1.228 (31.19) 1.226 (31.14) 0.11 (2.79) 0.09 (2.28) notes 1. lead no. 1 identified by dot or notch 2. plastic leads will be either solder dipped or tin plated in accordance with mil-m-38510 requirements. 24-lead cerdip (q-24) pin 1 1 24 12 13 1 24 12 13 0.295 (7.493) max 0.225 (5.715) max 0.125 (3.175) min 0.070 (1.778) 0.020 (0.508) 0.180 (4.572) max seating plane 1.290 (32.77) max 0.021 (0.533) 0.015 (0.381) typ 0.065 (1.651) 0.055 (1.397) typ 0.110 (2.794) 0.090 (2.286) typ 0.320 (8.128) 0.290 (7.366) 15 0 0.012 (0.305) 0.008 (0.203) typ 1. lead no. 1 identified by dot or notch. 2. cerdip leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 24-lead plastic dip (n-24a) pin 1 0.55 (13.97) 0.53 (13.47) 24 1 13 12 0.606 (15.4) 0.594 (15.09) 0.012 (0.305) 0.008 (0.203) 15 0 0.16 (4.07) 0.14 (3.56) 0.2 (5.08) max 0.065 (1.66) 0.045 (1.15) 0.105 (2.67) 0.095 (2.42) 1.25 (31.75) 1.24 (31.5) 0.02 (0.508) 0.015 (0.381) 0.175 (4.45) 0.12 (3.05) seating plane 28-lead soic (r-28) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.447) 6 0 0.03 (0.76) 0.02 (0.51) pin 1 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) 13 12 1 24 1. lead no. 1 identified by a dot. 2. soic leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements 0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.096 (2.44) 0.089 (2.26) 0.608 (15.45) 0.596 (15.13) 0.01 (0.254) 0.006 (0.15) 28-lead ssop (rs-28) 1. lead no. 1 identified by a dot. 2. leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements 0.009 (0.229) 0.005 (0.127) 0.037 (0.94) 0.022 (0.559) 8 0 0.0256 (0.65) bsc 0.07 (1.78) 0.066 (1.67) 0.328 (8.33) 0.318 (8.08) 0.008 (0.203) 0.002 (0.050) pin 1 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.207) 1 24 13 12
adm205Cadm211/adm213 rev. 0 C12C outline dimensions dimensions shown in inches and (mm). c1897C18C4/94 printed in u.s.a. 28-lead soic (r-28) 0.019 (0.49) 0.014 (0.35) 0.05 (1.27) bsc 0.708 (18.02) 0.696 (17.67) 0.01 (0.254) 0.006 (0.15) 0.096 (2.44) 0.089 (2.26) 0.013 (0.32) 0.009 (0.23) 0.042 (1.067) 0.018 (0.457) 6 0 0.03 (0.76) 0.02 (0.51) pin 1 0.299 (7.6) 0.291 (7.39) 0.414 (10.52) 0.398 (10.10) 15 14 1 28 1. lead no. identified by a dot. 2. soicleads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements. 28-lead ssop (rs-28) 1. lead no. 1 identified by a dot. 2. leads will be either tin plated or solder dipped in accordance with mil-m-38510 requirements 0.009 (0.229) 0.005 (0.127) 0.037 (0.94) 0.022 (0.559) 8 0 0.0256 (0.65) bsc 0.407 (10.34) 0.397 (10.08) 0.008 (0.203) 0.002 (0.050) 0.07 (1.78) 0.066 (1.67) pin 1 15 14 1 28 0.311 (7.9) 0.301 (7.64) 0.212 (5.38) 0.205 (5.207)

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